Chip Implementation with a Combined Wireless Temperature Sensor and Reference Devices Based on the DZTC Principle

This paper presents a novel CMOS wireless temperature sensor design in order to improve the sensitivity and linearity of our previous work on such devices. Based on the principle of CMOS double zero temperature coefficient (DZTC) points, a combined device is first created at the chip level with two voltage references, one current reference, and one temperature sensor. It was successfully fabricated using the 0.35 μm CMOS process. According to the chip results in a wide temperature range from −20 °C to 120 °C, two voltage references can provide temperature-stable outputs of 823 mV and 1,265 mV with maximum deviations of 0.2 mV and 8.9 mV, respectively. The result for the current reference gives a measurement of 23.5 μA, with a maximum deviation of 1.2 μA. The measurements also show that the wireless temperature sensor has good sensitivity of 9.55 mV/°C and high linearity of 97%. The proposed temperature sensor has 4.15-times better sensitivity than the previous design. Moreover, to facilitate temperature data collection, standard wireless data transmission is chosen; therefore, an 8-bit successive-approximation-register (SAR) analog-to-digital converter (ADC) and a 433 MHz wireless transmitter are also integrated in this chip. Sensing data from different places can be collected remotely avoiding the need for complex wire lines

A Low Power Fully Integrated Analog Baseband Circuit with Variable Bandwidth for 802.11 a/b/g WLAN

Abstract: This paper presents experimental results of an analog baseband circuit with variable bandwidth for WLAN direct conversion receiver in UMC 0.18um CMOS process. A seventh order chebyshev lowpass filter with triple bandwidth is used in the analog baseband circuit. The bandwidth is selectable from 7.56MHz, 19.5MHz, or 26.5MHz. The circuit adopts the servo loop for dc offset cancellation. It also has a gain range from 20dB to 60 dB with 10 dB steps while only dissipating 22.248mW. In addition, an automatic frequency tuning loop (ATL) is reported to achieve the bandwidth accuracy of the filter

28 dB Gain DC-6 GHz GaInP/GaAs HBT Wideband Amplifiers with and without Emitter Capacitive Peaking

High gain shunt-series shunt-shunt wideband amplifiers with and without capacitive peaking are demonstrated by using GaInP/GaAs HBT technology. Experimental results show that power gain is 28 dB and input/output return loss is better than 12 dB from DC to 6 GHz for the wideband amplifier without emitter capacitive gain peaking. On the other hand, the wideband amplifier with emitter capacitive gain peaking has the same gain but the power gain bandwidth increases up to 8 GHz at the cost of lower input/output return loss. Power and noise performance are very similar for both types of wideband amplifiers. Both circuits have 8 dBm OP1dB and 20 dBm OIP3 at 2.4 GHz Noise figure of both designs are below 2.8 dB from 1GHz to 6GHz. Total current consumption is 67 mA at 5 V supply voltage for both wideband amplifiers

A Novel Interpretation of Transistor -Parameters by Poles and Zeros for RF IC Circuit Design

In this paper, we have developed an interpretation of transistor -parameters by poles and zeros. The results from our proposed method agreed well with experimental data from GaAs FETs and Si MOSFET’s. The concept of source-series feedback was employed to analyze a transistor circuit set up for the measurement of the -parameters. Our method can describe the frequency responses of all transistor -parameters very easily and the calculated -parameters are scalable with device sizes. It was also found that the long-puzzled kink phenomenon of observed in a Smith chart can be explained by the poles and zeros of